Behind the shell of every smartphone is a processor that makes it tick. Such is the case for the Honor 5C. Powering the Honor 5C is the Kirin 650 chip from HiSilicon, a 16 nm chip that is created out of state of the art technology known as FinFET.
What is FinFET? Known as Fin Field Effect Transistor, FinFET is a type of “3D” transistor that is used in the design of modern day processors. At the core of this technology is the way the source and drain are pulled tall, creating a 3D planar structure which increases the surface area of contact between the gate and channel.
Prior to the advent of FinFET, transistors commonly utilised the metal-oxide-semiconductor field effect transistor (MOSFET) architecture. However, the problem with MOSFET was that below 20 nm, there was no way of controlling conductivity effectively as electrons might sneak from source to drain, causing leakage. In short, MOSFET was inefficient. With the introduction of FinFET, the creation of chips using this method allows the transistor to break the 20 nm bottleneck and become smaller while preventing any leakage, allowing the chip to operate efficiently. It is because of FinFET that the Kirin 650 was able to be efficient, all while measuring at only 16 nm in size.
On top of FinFET, the Kirin 650 also features ARM’s “big.LITTLE” architecture. Many of you who are familiar with Huawei’s devices would know about “big.LITTLE,” but for those who don’t, this architecture allows the Kirin 650 to fit four powerful processor cores and four less powerful cores into a single chip.
The idea behind “big.LITTLE” is simple, the four powerful cores will be utilised for larger chunks of data, while the smaller, less demanding tasks will be handled by the lesser cores. However, one of the problems that plagues the “big.LITTLE” architecture is the time lag created by the exchange of information between the four powerful cores, and the four less powerful cores. The solution to this problem? Integrating better sized and stronger cores within a smaller space. As the transistor becomes denser, the core surface area shrinks. So what does all this technical jargon mean? Well, this allows for greater functions and performance, better control of power consumption and heating, as well as savings on electricity/battery consumption.